1. Field of the Invention
This invention relates to a power semiconductor device, and more particularly to a power semiconductor device having a super junction structure.
2. Background Art
The on-resistance of a vertical power MOSFET (metal oxide semiconductor field effect transistor) greatly depends on the electric resistance of its conduction layer (drift layer). The dopant concentration that determines the electric resistance of the drift layer cannot exceed a maximum limit, which depends on the breakdown voltage of a pn junction interface between the base layer and the drift layer. Thus there is a tradeoff between the device breakdown voltage and the on-resistance. Improving this tradeoff is important in reducing the power consumption of a power device. This tradeoff has a limit determined by the device material. Overcoming this limit is the way to realizing devices with low on-resistance beyond existing power semiconductor devices.
As an example MOSFET to solve this problem, a structure with p-pillar layers and n-pillar layers alternately buried in the drift layer is known as a super junction structure. In the super junction structure, a non-doped layer is artificially produced by equalizing the amount of charge (amount of impurities) contained in the p-pillar layer with that contained in the n-pillar layer. Thus, while holding a high breakdown voltage, a current is passed through the highly doped n-pillar layer. Hence a low on-resistance beyond the material limit can be realized.
Thus the super junction structure can be used to achieve a balance between on-resistance and breakdown voltage beyond the material limit. However, if the amount of impurities in the p-pillar layer and that in the n-pillar layer become unequal to each other for some reason, the electric field distribution is varied by the charge due to the difference in the amount of impurities, decreasing the breakdown voltage. Hence, in manufacturing such a device, process variation needs to be taken into consideration in designing the device structure.
As a structure for preventing the decrease of breakdown voltage due to process variation, the inventors have developed and proposed a structure in which the impurity concentration profile of the p-pillar layer and the impurity concentration profile of the n-pillar layer are made different from each other (see JP-A 2004-119611 (Kokai)). In this structure, the balance between the amount of impurities in the p-pillar layer and the amount of impurities in the n-pillar layer is locally broken in advance. Thus, even if the amount of impurities in each pillar varies, the resulting variation of the electric field distribution is small, and the decrease of breakdown voltage can be prevented.
However, in this structure, the balance of the amount of impurities is forcibly broken. Hence it is necessary to increase the effective amount of impurities in the pillar layer. Thus the decrease of electric field due to the difference in the amount of impurities is canceled out by the increase of electric field due to the increase in the amount of impurities, decreasing the effect of varying the electric field distribution. Hence, for a sufficient variation of the electric field distribution, the difference in the amount of impurities needs to be further increased. Consequently, the amount of impurities in the p-pillar layer increases, and hence the n-pillar layer for passing the current tends to be depleted, increasing the on-resistance.